What is NAND flash process geometry and how does it relate to drive reliability?
Flash storage leverages wafers that hold dies used to store data. The NAND flash process geometry is how the dies are placed on that wafer. You can almost think of process geometry as the space between each die on the wafers. By shrinking that process, flash vendors can squeeze more dies on a wafer, thereby bringing down the cost per die as well as the overall cost of a flash solution.
The problem is the smaller this NAND flash process becomes, more errors are created and fewer writes can be withstood before die failure. However, the increase in errors can be offset by more intelligent flash controllers that correct errors in-line. Flash controllers can also counteract the decrease in write cycles by lowering the degree of charge used to write the data.
At a system level, vendors can take steps to help flash life by increasing flash capacity so there is more flash storage to spread the write load across. They can also implement storage efficiency techniques like compression and deduplication to lower the total number of writes to the flash storage.
As NAND flash process geometry shrinks, flash becomes more affordable but less reliable. So far vendors have been able to offset the reliability factors through technology. It remains to be seen, however, if they will be able to continue to do so as the geometry continues to shrink.
This was first published in December 2013