In this Q&A with Marc Staimer of Dragon Slayer Consulting, learn more about 3-D NAND technology, how different vendors' architectures compare and contrast, and when we'll see products based on 3-D NAND in the market.
What is 3-D NAND and why is it necessary?
Mark Staimer: 3-D NAND is the vertical stacking of NAND cells or layers of cells -- not to be confused with vertical chip stacking. It's necessary because 2-D NAND is getting close to die size limitations and chip density. It's running out of steam.
In technology, if you are not advancing, you're dying. Current 2-D NAND state of the art is 20 nm and 19 nm. Next step is 14 nm. Getting past 10 nm may be tough because of increasing electron leakage. [Three-dimensional] NAND is the industry's answer.
In 3-D NAND, what is a charge trap, and how does it differ from floating gate technology?
Staimer: Charge trap technology uses silicon nitride film to store electrons rather than the doped polycrystalline silicon frequently utilized by the floating gate technology. In a layperson's terms, charge trap flash stores electrons by capturing or trapping them in an insulator layer. Floating gate captures or traps electrons in a conductor layer. Those seemingly minor differences play out in flash endurance or wear life.
The general rule of thumb is that floating gate NAND wears out sooner and/or costs more than charge trap. Charge trapping requires a thinner layer that typically calls for less voltage, higher performance and better scaling. However, materials advancement by some vendors has narrowed the gap. For a user of flash SSDs, it is a matter of data resiliency, performance and cost.
I've heard there are different types of 3-D NAND?
Staimer: There are as many different types of 3-D NAND as there are vendors. Each one has its own 3-D NAND technology.
How do they differ in structure?
Staimer: Toshiba-SanDisk and Samsung combined own about 75% of the market share today. Both of these two giant partnerships are each developing variants of charge trapped flash technology. Toshiba calls their 3-D NAND Pipe-shaped Bit-Cost Scalable, -- acronym is P-BICS. Samsung calls their 3-D NAND Terabit Cell Transistor -- acronym is "TCAT." Although conceptually similar, they are very different metal alloys and designs. Hynix is working on a floating gate architecture. Micron is doing a variant of charge trapping based on deep-trench [dynamic] RAM.
Does one offer any benefits over the others or are they comparable?
Staimer: At this stage, it is too early to tell. It will come down to density, cost per [gigabyte], resilience, reliability, etc. Theoretically, charge trap might have a slight cost advantage. Ultimately, that will come down to yield and execution. Each vendor has placed a bet. The market will wring out the winners and losers.
Are you seeing 3D NAND flash in products on the market today? If not, when might we expect them?
Staimer: Samsung announced, in August of 2013 general mass production of their 3-D NAND and is shipping in quantities their 960-GB and 480-GB V-NAND[Vertical NAND] SSDs based on their 3-D NAND. Expect other vendors to follow suit this year.
This was first published in March 2014