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IBM Research is trying to spark interest in phase-change memory with news that its scientists have demonstrated reliably storing three bits of data per cell.
Haris Pozidis, manager of non-volatile memory research at IBM Research in Zurich, called three-bits-per-cell storage a "significant milestone" because it could drop the cost of phase-change memory (PCM) well below DRAM and closer to NAND flash. The greater density and price drop could help PCM compete with 3D XPoint as a successor or complement to NAND.
Speaking at this week's IEEE International Memory Workshop in Paris, Pozidis said he doesn't envision PCM as a replacement for DRAM or NAND flash technologies. But he said it could "fill a void between the two" and enable and accelerate applications such as in-memory databases or big-data, machine-learning applications.
Because IBM is not a memory manufacturer, the company seeks to find a vendor with which it can collaborate on a three-bits-per-cell, or triple-level cell (TLC), PCM chip, Pozidis said. He expressed hope that PCM-based products might emerge beginning in 2017.
IBM worked on a two-bits-per-cell PCM chip from 2012 to 2015 with SK hynix, a South Korean memory-based semiconductor manufacturer. Pozidis said he does not know if SK hynix plans to bring the chip to market.
An SK hynix spokesperson said the company has been working on phase-change memory, called PC-RAM but would not disclose any further details.
Phase-change memory advantages
Phase-change memory holds out the promise of major advantages over DRAM and NAND flash. Unlike DRAM, PCM does not lose data when powered off. PCM can also achieve greater density than DRAM. Pozidis said DRAM currently offers at most 8 GB per chip, whereas TLC PCM could be four to eight times more at the outset and achieve flash-like capacities as the technology matures.
Pozidis added that PCM approaches DRAM performance levels and is significantly faster than flash. He said if DRAM is in the order of 15 nanoseconds for reads and writes, PCM could be 200 to 500 nanoseconds for reads and a half a microsecond to one microsecond for writes. Flash can range from 100 microseconds to two milliseconds, according to Pozidis.
IBM tests with legacy PCM chips running on Power8 servers produced a write latency of less than four microseconds and an end-to-end read latency of less than nine microseconds, Pozidis said. He said the read or write latency with flash could be 70 microseconds.
Phase-change memory is also capable of far greater endurance than NAND flash. PCM can withstand at least 10 million write cycles in comparison to the 30,000 write cycles of enterprise multilevel cell (MLC) flash or 3,000 write cycles of consumer-grade MLC, according to IBM.
Pozidis said PCM can be "written in place, so you don't have to erase first, as in flash. That makes the design of controllers much easier."
PCM could show up in servers, storage
IBM Research envisions standalone phase-change memory and hybrid implementations combining PCM and flash storage. Pozidis said PCM could take the form of a dual in-line memory module or an SSD. He said IBM would use PCM in servers and storage systems.
One product area where IBM would find an immediate use for PCM is in all-flash arrays, "where metadata is exploding because of the very large capacity of these arrays, in the order of hundreds of terabytes," Pozidis said.
"The DRAM that is being used today is not adequate, or it costs too much to store this metadata that has to be retrieved all the time," Pozidis said.
Jim Handy, a semiconductor analyst at Objective Analysis, said IBM revealed its latest PCM work to try to increase interest from memory manufacturers.
Handy said IBM is essentially promoting the same idea that Intel and Micron introduced last July with their 3D XPoint - a memory technology that is faster than NAND flash and slower than DRAM, and cheaper than DRAM although more expensive than flash.
"You can't have this new memory layer unless it's cheaper than DRAM, and that's going to be a very difficult thing to achieve," Handy said. "IBM is showing what looks like it's going to be an easier way to get cheaper than DRAM than what Intel and Micron were showing."
Phase-change memory vs. 3D XPoint
The Intel/Micron approach is to store one bit per cell and layer two memory cells on top of each other, Handy said. By contrast, IBM chose to use a single layer of cells and well-proven multilevel cell (MLC) technology. IBM is taking an approach common to NAND flash and adapting it to PCM.
Handy said, should PCM emerge in products, he would expect it to be used as memory -- not as storage -- "mostly because there is no software that understands that system architecture yet. That software is going to take a few years to get introduced, and it's going to take a few more years to become widespread," he said.
Handy said he expects a market for a new memory layer to boost the performance of any application, server or SAN system. But he said he wouldn't bet on either IBM's PCM or the Intel/Micron 3D XPoint. He pointed out that no manufacturer is sampling IBM's PCM or trying to sell OEMs on the idea of using it. Meanwhile, Intel and Micron may be trying to sell OEMs on 3D XPoint, but they face the difficult challenge of getting new process technologies to work right, Handy said.
In addition to cost, one potential disadvantage of PCM is thermal disturbance. Pozidis said heat is required to seek a certain cell, and when that happens, the neighboring cell might heat up as well. "This may cause some unintentional programming of the neighboring cell," he said.
Pozidis said thermal disturbance is not yet a problem, but it could become an issue as the technology nodes become smaller.
One breakthrough that Pozidis cited with IBM's recent PCM work is the technology's ability to withstand temperature fluctuations up to 167 degrees Fahrenheit. When IBM Research demonstrated two-bits-per-cell PCM in 2011, the technology could not achieve data retention under high-temperature conditions, he said.
"That's considered to be one of the big weaknesses of phase-change memory -- that it cannot withstand temperature variations. We proved that we can do it even under temperature variations up to 75 degrees [Centigrade]," Pozidis said. "If you use phase-change memory in a data center, then you're going to have to be able to withstand temperature fluctuations."
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